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Author Topic: FPGA hardware accelerated fractal rendering  (Read 444 times)
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vinecius
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« on: June 16, 2017, 08:25:17 PM »

FPGA acceleration is known to beat mainframes by orders of magnitude.  I've seen a fpga mandelbrot generator but dont recall the details and the level of specialization of the hardware definition, it may have just been a CPU implemented in an FPGA.

Has anyone thought of this before and to what extent has it been done?  I also wonder what would be the best way to implement it.  I was thinking specialized blocks that do nothing but escape time on a single point and then fill the FPGA with as many as would fit.
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ker2x
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« Reply #1 on: June 25, 2017, 12:17:43 PM »

I bought a papilio board ( http://papilio.cc/ ) some times ago, to learn to use FPGA stuff and VHDL.

- Xilinx Spartan 6 LX9 FPGA
- 64Mbit (8MByte) SDRAM

Long story short : it didn't go well  embarrass

Doing computation and floating point stuff in FPGA is a serious nightmare.
You'll find out that the softcore CPU library you find do not do floating point.
They're also "low consumption, low performance" CPU, they're mostly here for people who want to run an embedded OS in their FPGA without reinventing the wheel so they can focus on integrating their speciality (eg : handling high speed I/O) in the FPGA while having a nice conveniant block to do the misc stuff (eg : communicating with a display controller to show some information, handling interrupt, ...)

FPGA accelerated fractal imply using the FPGA as a co-processor with specialized floating point instruction to do the heavy complex math.
Let's just assume we don't care about communication stuff and use a fpga usb card with a simple softcore cpu to take care of it.

You need to implement a FPU on your FPGA : super difficult.
Make it communicate with the whatever-bus your softcore cpu use.
handle a memory chipset. sram are easy to use but super expensive and therefore tiny (a few KB), sdram is much cheaper but really difficult to use. because you'll need quite a lot of it (a few MB is a lot).

FPGA in datacenter is quite new, this is because you can now use OpenCL to program your FPGA.
However, last time i check : THE SOFTWARE IS SUPER EXPENSIVE !!

I admit i didn't check since a long time, it's probably cheaper now. And Intel bought Altera, perhaps things got cheaper ?

You need a FPGA support for openCL, they're high performance FPGA, very expensive too.
You need a FPGA board that use the FPGA you want (very expensive)
You need the software/compiler/ide/thingy/whatever ...
You'll probably have to buy some IP because they're most likely PCI-Express card and your FPGA will have to handle it (without frying your motherboard or constantly crashing your OS).
...

TL;DR : too expensive, really difficult.

Edit : you won't find any "just google it" support to help you solve all the weird bug you'll have.
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often times... there are other approaches which are kinda crappy until you put them in the context of parallel machines
(en) http://www.blog-gpgpu.com/ , (fr) http://www.keru.org/ ,
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ker2x
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« Reply #2 on: June 25, 2017, 12:32:14 PM »

If you want to play with hardware, you'll probably have more fun buying an ARM board that integrate a DSP and a FPU, download a RTOS and have fun.

I have this one http://www.st.com/en/evaluation-tools/nucleo-f401re.html (got it for 4Ç) collecting dust on my desktop just for this purpose.
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often times... there are other approaches which are kinda crappy until you put them in the context of parallel machines
(en) http://www.blog-gpgpu.com/ , (fr) http://www.keru.org/ ,
Sysadmin & DBA @ http://www.over-blog.com/
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